Enhancement of detection of defects on display panels using front lighting

Front-side illumination apparatus and methods are provided to enable, in general, detection of a-Si residue defects at the array test step well before the cell step. A-Si has high resistivity without exposure to light making it difficult to detect in conventional TFT-array test procedures. On the other hand, when the a-Si residue is illuminated with a light, its resistivity decreases, which, in turn, changes the electrical properties of the TFT array cell, which may be detected using the voltage imaging optical system (VIOS). In one implementation, the TFT array cell is exposed to illuminating light pulses, impacting the top side of the TFT panel during the testing performed using the VIOS. In one implementation, the front side illumination is traveling along the same path as the illumination used for voltage imaging in the VIOS. In another implementation, light source(s) for front side illumination are located in the close proximity to the VIOS modulator.