Verification method of compiler based on contrast of logical structures of control flow graphs
The invention relates to a verification method of a compiler based on contrast of logical structures of control flow graphs, which comprises the following steps: 1) constructing the control flow graph of source codes; 2) constructing the control flow graph of object codes; and 3) using an isomorphic...
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| Format: | Patent |
| Sprache: | chi ; eng |
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| Zusammenfassung: | The invention relates to a verification method of a compiler based on contrast of logical structures of control flow graphs, which comprises the following steps: 1) constructing the control flow graph of source codes; 2) constructing the control flow graph of object codes; and 3) using an isomorphic graph algorithm to carry out contrast on the control flow graphs of the source codes and the object codes. The verification method has the advantages of being capable of effectively detecting the problem of malice codes in the compiler, and having high degree of accuracy due to the adoption of analysis based on the control flow graphs and the isomorphic comparison algorithm. |
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