Method and device for enhancing persistence of EEPROM
The invention relates to a method and a device for enhancing persistence of EEPROM. The method comprises the step of: controlling the electric field strength of a gate oxide layer to be within the range from 10 to 15MV/cm by using a controllable high-voltage signal during the erasing or writing for...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention relates to a method and a device for enhancing persistence of EEPROM. The method comprises the step of: controlling the electric field strength of a gate oxide layer to be within the range from 10 to 15MV/cm by using a controllable high-voltage signal during the erasing or writing for an EEPROM with a floating gate tunnel oxide structure. The device comprises a clock generating drive circuit and a charge pump, wherein the clock generating drive circuit is used for generating a clock drive signal; the charge pump is used for generating a controllable high voltage signal accordingto the clock drive signal; and the controllable high voltage signal is used for controlling the electric field strength of the gate oxide layer to be within the range from 10 to 15MV/cm during the erasing or writing of the EEPROM with the floating gate tunnel oxide structure. By controlling the electric field strength on the gate oxide layer to be within a reasonable range, the device for enhancing the persistence of the |
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