Methods for normalizing strain in semiconductor devices and strain normalized semiconductor devices

A method of normalizing strain in semiconductor devices and normalized strain semiconductor devices. The method includes: forming first and second field effect transistors of an integrated circuit; forming a stress layer over the first and second field effect transistors, the stress layer inducing s...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: ELLIS-MONAGHAN JOHN JOSEPH, BERNSTEIN KERRY, HABIB NAZMUL, BALCH BRUCE
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator ELLIS-MONAGHAN JOHN JOSEPH
BERNSTEIN KERRY
HABIB NAZMUL
BALCH BRUCE
description A method of normalizing strain in semiconductor devices and normalized strain semiconductor devices. The method includes: forming first and second field effect transistors of an integrated circuit; forming a stress layer over the first and second field effect transistors, the stress layer inducing strain in channel regions of the first and second field effect transistors; and selectively thinning the stress layer over at least a portion of the second field effect transistor.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN101847605A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN101847605A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN101847605A3</originalsourceid><addsrcrecordid>eNrjZEj2TS3JyE8pVkjLL1LIyy_KTczJrMrMS1coLilKzMxTAKLi1NzM5Py8lNLkEqCalNSyzOTUYoXEvBSYGpi21BTsankYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSbyzn6GBoYWJuZmBqaMxMWoAKx0_lA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Methods for normalizing strain in semiconductor devices and strain normalized semiconductor devices</title><source>esp@cenet</source><creator>ELLIS-MONAGHAN JOHN JOSEPH ; BERNSTEIN KERRY ; HABIB NAZMUL ; BALCH BRUCE</creator><creatorcontrib>ELLIS-MONAGHAN JOHN JOSEPH ; BERNSTEIN KERRY ; HABIB NAZMUL ; BALCH BRUCE</creatorcontrib><description>A method of normalizing strain in semiconductor devices and normalized strain semiconductor devices. The method includes: forming first and second field effect transistors of an integrated circuit; forming a stress layer over the first and second field effect transistors, the stress layer inducing strain in channel regions of the first and second field effect transistors; and selectively thinning the stress layer over at least a portion of the second field effect transistor.</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20100929&amp;DB=EPODOC&amp;CC=CN&amp;NR=101847605A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20100929&amp;DB=EPODOC&amp;CC=CN&amp;NR=101847605A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>ELLIS-MONAGHAN JOHN JOSEPH</creatorcontrib><creatorcontrib>BERNSTEIN KERRY</creatorcontrib><creatorcontrib>HABIB NAZMUL</creatorcontrib><creatorcontrib>BALCH BRUCE</creatorcontrib><title>Methods for normalizing strain in semiconductor devices and strain normalized semiconductor devices</title><description>A method of normalizing strain in semiconductor devices and normalized strain semiconductor devices. The method includes: forming first and second field effect transistors of an integrated circuit; forming a stress layer over the first and second field effect transistors, the stress layer inducing strain in channel regions of the first and second field effect transistors; and selectively thinning the stress layer over at least a portion of the second field effect transistor.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZEj2TS3JyE8pVkjLL1LIyy_KTczJrMrMS1coLilKzMxTAKLi1NzM5Py8lNLkEqCalNSyzOTUYoXEvBSYGpi21BTsankYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSbyzn6GBoYWJuZmBqaMxMWoAKx0_lA</recordid><startdate>20100929</startdate><enddate>20100929</enddate><creator>ELLIS-MONAGHAN JOHN JOSEPH</creator><creator>BERNSTEIN KERRY</creator><creator>HABIB NAZMUL</creator><creator>BALCH BRUCE</creator><scope>EVB</scope></search><sort><creationdate>20100929</creationdate><title>Methods for normalizing strain in semiconductor devices and strain normalized semiconductor devices</title><author>ELLIS-MONAGHAN JOHN JOSEPH ; BERNSTEIN KERRY ; HABIB NAZMUL ; BALCH BRUCE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN101847605A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2010</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>ELLIS-MONAGHAN JOHN JOSEPH</creatorcontrib><creatorcontrib>BERNSTEIN KERRY</creatorcontrib><creatorcontrib>HABIB NAZMUL</creatorcontrib><creatorcontrib>BALCH BRUCE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>ELLIS-MONAGHAN JOHN JOSEPH</au><au>BERNSTEIN KERRY</au><au>HABIB NAZMUL</au><au>BALCH BRUCE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Methods for normalizing strain in semiconductor devices and strain normalized semiconductor devices</title><date>2010-09-29</date><risdate>2010</risdate><abstract>A method of normalizing strain in semiconductor devices and normalized strain semiconductor devices. The method includes: forming first and second field effect transistors of an integrated circuit; forming a stress layer over the first and second field effect transistors, the stress layer inducing strain in channel regions of the first and second field effect transistors; and selectively thinning the stress layer over at least a portion of the second field effect transistor.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language chi ; eng
recordid cdi_epo_espacenet_CN101847605A
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Methods for normalizing strain in semiconductor devices and strain normalized semiconductor devices
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-05T11%3A49%3A51IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=ELLIS-MONAGHAN%20JOHN%20JOSEPH&rft.date=2010-09-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN101847605A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true