On-wafer self-test and self-repair method

The invention belongs to the field of integrated circuit design, particularly relates to a method capable of carrying out self test on a chip without depending on an external device in the condition of live working and performing self repair according to a test result. The self test of the method can be applied to all structures and parts in the chip; and the self repair of the method can be applied to all structures and parts with backup units. The self-test and self-repair course based on the method comprises two stages: a first stage is test and repair stage, wherein the self test is carried out firstly, and a failure unit is replaced by a backup unit according to a test result; and a second stage is the retest stage, wherein if no error is tested, the on-wafer self-test and self-repair is finished, and otherwise an unrepairable signal is produced for external detection. The invention realizes on-wafer self repair with lower cost and replaces a failure part with the backup unit, thereby improving the yield