Novel high-k metal gate structure and method of making

The present disclosure provides a semiconductor device and a manufacturing method thereof, the device includes a semiconductor substrate and a transistor formed in the substrate. The transistor includes a gate stack having a high-k dielectric and metal gate, a sealing layer formed on sidewalls of the gate stack, the sealing layer having an inner edge and an outer edge, the inner edge interfacing with the sidewall of the gate stack, a spacer formed on the outer edge of the sealing layer, and a source/drain region formed on each side of the gate stack, the source/drain region including a lightly doped source/drain (LDD) region that is aligned with the outer edge of the sealing layer. The present invention provides a simple and economic sealing structure and a method, so as to hold the integrality of metal gate high-k dielectric thereby improving the efficacy and reliability of the device.