Low voltage and low power differential driver with matching output impedances

The present invention provides a system and a method for driving a differential signal which includes a differential data input, a plurality of switches coupled to a current source for steering current depending on the differential data input, a first differential output and a second differential output from a resistor coupled to at least two of the plurality of switches and a first source follower and a second source follower coupled to the first differential output and the second differential output for controlling output impedance. This architecture prevents the common mode noise reflected from the driver from becoming a differential signal and meets the requirements of the LVDS and SubLVDS standard down till 1.62V. Also this architecture is capable of operating in Gbps range making it a high-speed differential driver with very low power.