Time-to-digital conversion circuit and method
The invention discloses a time-to-digital conversion circuit, which comprises N (N is larger than 1) latch unit, at least a resistor and capacitor serially connected chain, a first triggering signal, and a second triggering signal. The invention further provides a time-to-digital conversion method,...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a time-to-digital conversion circuit, which comprises N (N is larger than 1) latch unit, at least a resistor and capacitor serially connected chain, a first triggering signal, and a second triggering signal. The invention further provides a time-to-digital conversion method, which comprises: adjusting resistance and/or capacitance value of the time-to-digital conversion circuit to allow digital signals with N time intervals to be uniformly spaced; and processing the digital signals with N time intervals to obtain a time difference signal of the first triggering signal and the second triggering signal, which is a binary digital signal. The inventive time-to-digital conversion circuit adopts a resistor and capacitor serially connected structure, so as to realize time-to-digital conversion with higher precision, dispenses with frequent circuit turnover, so as to reduce power consumption, can be simply converted to a next generation with the progression of process, so as to save design tim |
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