Semiconductor device having super junction structure and method of manufacturing the same

The invention relates to a semiconductor device (201, 202) which comprises: a silicon substrate (1a) provided with a (110)-oriented surface; a PN column layer (30a) arranged on the (110)-oriented surface; a channel-forming layer (3) arranged on the PN column layer (30a); a plurality of source regions (4) arranged on a surface portion of the channel-forming layer (3); and gate electrodes (40a, 40b) penetrating through the channel-forming layer (3). The PN column layer (30a) comprises first columns (2n) provided with a first conductivity type and second columns (2p) provided with a second conductivity type which are alternately arranged in a manner that the first columns (2n) contact the second columns (2p) respectively on (111)-oriented surfaces. The gate electrodes (40a, 40b) are respectively adjacent to the source regions (4), and each of the gate electrodes (40a, 40b) is provided with side surfaces crossing the contact surfaces of the first columns (2n) and the second columns (2p) in a plane of the silicon