True/complement circuit and processor

The invention relates to an integrated circuit, comprising a data node, an output node and a setting logic coupled with the data nodes and the output nodes. The setting logic changes the state of theoutput node by responding to the change on the state of the data node. The integrated circuit also comprises a reset transistor coupled with the data node for resetting the data node to a first stateby responding to the conversion of a time sequence signal; an input transistor coupled with the data node for affirming the data node to a second state by responding to a received data signal; and a reset logic coupled between the output node and the data node, wherein, if the output node reaches to the setting state, the first reset logic resets the output node to the initial state by respondingto the reset of the data node. The integrated circuit also comprises a feedback logic coupled between the output node and the reset input node of the reset logic, and the feedback logic limits the duration of the operation of t