Semiconductor integrated circuit and method of designing the same

In a semiconductor integrated circuit, since resistance component is included in a power-supply wiring, a power-supply voltage supplied to a cell on a clock path is dropped to cause a clock skew. To avoid this problem, a cell-placement prohibiting area is set centering on a cell 10 on the clock path...

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Bibliographische Detailangaben
1. Verfasser: MATSUMURA YOICHI,OHASHI TAKAKO,FUJIMURA KATSUYA,ITOH CHIHIRO,TANIGUCHI HIROKI
Format: Patent
Sprache:eng
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Zusammenfassung:In a semiconductor integrated circuit, since resistance component is included in a power-supply wiring, a power-supply voltage supplied to a cell on a clock path is dropped to cause a clock skew. To avoid this problem, a cell-placement prohibiting area is set centering on a cell 10 on the clock path, and no cell for performing a logical operation is placed in this cell-placement prohibiting area. Also, a cell-placement prohibiting area may be set for each of cell groups formed of a plurality of cells closely placed together. Furthermore, a capacitive cell may be placed in the cell-placement prohibiting area.