Cross-clock domain asynchronous data processing, cross-clock domain method of the asynchronous data, and its device
The invention provides a across clock domain asynchronous data process method and device, asynchronous data across clock domain method and device, said across clock domain asynchronous data process method includes: Sampling the data signal to obtain the data signal which belongs to the first clock a...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | The invention provides a across clock domain asynchronous data process method and device, asynchronous data across clock domain method and device, said across clock domain asynchronous data process method includes: Sampling the data signal to obtain the data signal which belongs to the first clock area; said data signal of the first clock area is asynchronously processed to obtain the data signal which belongs to the second clock area; said data signal of the second clock area is transferred to the second clock area in single point; the data signal of the second clock area is combinational logically processed and output the logical result. The technique scheme of the invention decreases the probability of metastable state that when data signal is transferred from one clock area to anther clock area, it resolves the condition that logical output error generated by different time delay, the stability of circuit is greatly improved. |
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