Flash memory element
A flash memory device comprises a first group of dummy memory cells disposed between source selection transistors, which are coupled to a source selection line, and memory cells coupled to a first wordline. The flash memory device further comprises a second group of dummy memory cells disposed betwe...
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creator | BOKU HEISHU LEE KYEONG BOCK PARK HEE SIK |
description | A flash memory device comprises a first group of dummy memory cells disposed between source selection transistors, which are coupled to a source selection line, and memory cells coupled to a first wordline. The flash memory device further comprises a second group of dummy memory cells disposed between drain selection transistors, which are coupled to a drain selection line, and memory cells coupled to the last wordline. The flash memory device is configured to prevent program disturbance in deselected cell strings and degradation of programming/erasing speeds in a selected cell string. |
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The flash memory device further comprises a second group of dummy memory cells disposed between drain selection transistors, which are coupled to a drain selection line, and memory cells coupled to the last wordline. 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The flash memory device further comprises a second group of dummy memory cells disposed between drain selection transistors, which are coupled to a drain selection line, and memory cells coupled to the last wordline. The flash memory device is configured to prevent program disturbance in deselected cell strings and degradation of programming/erasing speeds in a selected cell string.</description><subject>ELECTRICITY</subject><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2009</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBBxy0kszlDITc3NL6pUSM1JzU3NK-FhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfHOfoYGBqYGhhZmls7OxkQpAgCEvCE0</recordid><startdate>20090617</startdate><enddate>20090617</enddate><creator>BOKU HEISHU</creator><creator>LEE KYEONG BOCK</creator><creator>PARK HEE SIK</creator><scope>EVB</scope></search><sort><creationdate>20090617</creationdate><title>Flash memory element</title><author>BOKU HEISHU ; LEE KYEONG BOCK ; PARK HEE SIK</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN100501869CC3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2009</creationdate><topic>ELECTRICITY</topic><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>BOKU HEISHU</creatorcontrib><creatorcontrib>LEE KYEONG BOCK</creatorcontrib><creatorcontrib>PARK HEE SIK</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BOKU HEISHU</au><au>LEE KYEONG BOCK</au><au>PARK HEE SIK</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Flash memory element</title><date>2009-06-17</date><risdate>2009</risdate><abstract>A flash memory device comprises a first group of dummy memory cells disposed between source selection transistors, which are coupled to a source selection line, and memory cells coupled to a first wordline. The flash memory device further comprises a second group of dummy memory cells disposed between drain selection transistors, which are coupled to a drain selection line, and memory cells coupled to the last wordline. The flash memory device is configured to prevent program disturbance in deselected cell strings and degradation of programming/erasing speeds in a selected cell string.</abstract><oa>free_for_read</oa></addata></record> |
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language | chi ; eng |
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subjects | ELECTRICITY INFORMATION STORAGE PHYSICS STATIC STORES |
title | Flash memory element |
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