CH626203
A semiconductor transmission circuit arrangement which utilizes symmetrical transmission transistors and bias circuitry which exhibits a high output impedance and is arranged to maintain equal d.c. bias currents in the base and the emitter/collectors of the transmission transistor. A multiple collec...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A semiconductor transmission circuit arrangement which utilizes symmetrical transmission transistors and bias circuitry which exhibits a high output impedance and is arranged to maintain equal d.c. bias currents in the base and the emitter/collectors of the transmission transistor. A multiple collector transistor is utilized as a primary current source and a current mirror circuit is used as a control arrangement. |
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