Schaltungsanordnung zum Vergleichen zweier Sätze binär kodierter Daten

965,138. Comparators; carry circuits. SPERRY RAND CORPORATION. July 19,1962 [Aug. 2, 1961], No. 27736/62. Headings G4A and G4M. A circuit for comparing two binary numbers employs a majority logic circuit for each digit comparison stage. A similar circuit can be arranged to provide a carry-indication output in an addition operation. As described,for comparing two four-digit binary numbers in registers 30, 32 with the highest order at the left,a comparison circuit comprises four 3-input majority logic circuits 34, 36, 38, 40 each comprising a tunnel diode (Fig. 1, not shown) and adapted to provide a "1" output when a "1" is applied to any two or all three of the three inputs. One input of each logic circuit is connected to the normal output of the corresponding stage of the register 30, the second input being the complementary output at the corresponding stage of the register 32 and the third input being from a backward diode such as 42 connected to the output of the majority logic circuit of next lower order, except for the lowest order which is permanently connected to a "1" input. A "O" output at 52 is obtained if the number in the register 30 is less than the number in the register 32, a "1" output at 52 being obtained in other cases. A second comparison circuit 44-50 is provided, having an output at 54, the two outputs 52, 54 enabling equality of the two numbers compared to be distinguished. By connecting each logic circuit to the normal output of both corresponding register stages, a carry output for the addition of the two numbers can be obtained at 52.