POWER MANAGEMENT INTEGRATED CIRCUIT

The present invention concerns a power management integrated circuit (1) comprising a reference signal generator (3A), a start-up unit (21) and a supervisory circuit (7A). The supervisory circuit comprises: - an electrical resistance circuit (25) connected between a first end node and a second end node; - a power supply input (19) for receiving a supply voltage, this power supply input being connected to the first end node; - a low reference potential node (GND); - a comparator (31) for comparing a reference voltage value (V ref) at a first input and a divided voltage value (V Lev1) at a second input connected to an internal electrical node of the electrical resistance circuit, the comparator (31) being configured to output a monitoring signal. The supervisory circuit further comprises a switch (17) between the second end node and the low reference potential node, this switch being controlled by the start-up unit (21) so that the switch is selectively closed and opened based on a detected operational state of the reference signal generator indicating a normal functioning phase of the power management circuit.