LOW LEAKAGE AND DATA RETENTION CIRCUITRY

LOW LEAKAGE AND DATA RETENTION CIRCUITRY

An integrated circuit includes first circuitry (1010) and sleep transistor circuitry (SL3). The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption o...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: WALKER, WILLIAM G, CALLAHAN, JOHN M, ZAMPAGLIONE, MICHAEL A, HOBERMAN, BARRY A, HILLMAN, DANIEL L, COLE, ANDREW
Format: Patent
Sprache:eng ; fre
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
INFORMATION STORAGE
PHYSICS
PULSE TECHNIQUE
STATIC STORES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:An integrated circuit includes first circuitry (1010) and sleep transistor circuitry (SL3). The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep signal that has a negative voltage. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry. Circuit intégré comportant un premier circuit (1010) et des circuits de veille transistorisés (SL3). Le premier circuit reçoit des signaux d'entrée et les traite. De plus, le premier circuit conserve les données dans un signal de veille à tension négative. Ledit circuit réduit la consommation du premier circuit à l'état de veille, pour quil ait de faibles fuites sur le signal de veille, tout en conservant les données dans le premier circuit.