DEBUG CIRCUIT COMPARING PROCESSOR INSTRUCTION SET OPERATING MODE

A processor is operative to execute two or more instruction sets, each in a different instruction set operating mode. As each instruction is executed , debug circuit comparison the current instruction set operating mode to a t arget instruction set operating mode sent by a programmer, and outputs an al ert or indication in they match. The alert or indication may additionally be dependent upon the instruction address following within a predetermined tar get address range. The alert or indication may comprise a breakpoint signal that halts execution and/or it is output as an external signal of the proces sor. The instruction address at which the processor detects a match in the i nstruction set operating modes may additionally be output. Additionally or a lternatively, the alert or indication may comprise starting or stopping a tr ace operation, causing an exception, or any other known debugger function.