A PROCESSING CIRCUIT AND A SEARCH PROCESSOR CIRCUIT
A processing circuit P1 for recognition and comparison of complex patterns in high-speed data streams can form a node in a network of circuits of this kind and comprises an interface for inputting of parameters for the circuit, at least one kernel processor P0 in the form of a comparator unit (COM)...
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Zusammenfassung: | A processing circuit P1 for recognition and comparison of complex patterns in high-speed data streams can form a node in a network of circuits of this kind and comprises an interface for inputting of parameters for the circuit, at least one kernel processor P0 in the form of a comparator unit (COM) for comparing two data words, a logic unit (E) connected with the comparator unit and comprising a multiplexer (MUX1), a first D flip-flop (2), a latency unit (LAT) for delaying a positive binary value with a given number of time units, a second D flip-flop (4), a sequence control unit (SC) which monitors and controls a comparison operation in the comparator unit (COM), and a result selector (RS) which combines two result values from other processing circuits or other result selectors. A search processor circuit (PMC) for performing search and comparison operations on complex patterns comprises a multiprocessor unit P n with processing circuits P1 in a tree structure and forms a binary or superbinary tree with n+1 levels S and degree k = 2m, m being a positive integer .gtoreq. 1. An underlying level S n-q generally comprises 2mq circuits P n-q provided nested in the 2m(q-1) circuits P n-q+1 on the level S n-q+1. A 0th level S0 defined for q = n in the unit P n comprises 2m(n-1) to 2mn kernel processorsP0 which form comparator units (COM) in the circuits P1. All circuits P1, P2...Pn have identical interfaces (1) and a logic unit (E) with a result selector (RS) for collecting the results of a search operation or a comparison operation. Use in search engines for search and retrieval of data stored in data bases. |
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