VOLTAGE-CONTROLLED DELAY UNIT FOR DELAY-LOCKED LOOP DEVICES

A delay unit for introducing a delay on a data signal. The delay unit comprises one or more stages, and each stage includes a chain of inverters. A capacitive load is applied to the output node of each inverter. The capacitive load is provided by the gate capacitance of a field effect transistor and...

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Bibliographische Detailangaben
1. Verfasser: TORIELLI, ALESSANDRO
Format: Patent
Sprache:eng ; fre
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Beschreibung
Zusammenfassung:A delay unit for introducing a delay on a data signal. The delay unit comprises one or more stages, and each stage includes a chain of inverters. A capacitive load is applied to the output node of each inverter. The capacitive load is provided by the gate capacitance of a field effect transistor and is variable in response to a control signal applied to the gate of the transistor.