REDUNDANT PAGE IDENTIFICATION FOR A CATALOGUED MEMORY

REDUNDANT PAGE IDENTIFICATION FOR A CATALOGUED MEMORY

REDUNDANT PAGE IDENTIFICATION FOR A CATALOGED MEMORY A redundant error-detecting addressing code for use in a cache memory. A directory converts logical data addresses to physical addresses in the cache where the data is stored in blocks. The blocks are expanded to include redundant addressing infor...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MARAZAS, GERALD A, MCNEILL, ANDREW B., JR, FARRELL, ROBERT H, DIXON, JERRY D, MERCKEL, GERALD U
Format: Patent
Sprache:eng ; fre
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:REDUNDANT PAGE IDENTIFICATION FOR A CATALOGED MEMORY A redundant error-detecting addressing code for use in a cache memory. A directory converts logical data addresses to physical addresses in the cache where the data is stored in blocks. The blocks are expanded to include redundant addressing information such as the logical data address and the physical cache address. When a block is accessed from the cache, the redundant addressing is compared to the directory addressing information to confirm that the correct data has been accessed.