METHOD OF MANUFACTURING AN INSULATED GATE FIELD-EFFECT TRANSISTOR USING NARROW SILICON NITRIDE STRIP MASK

PEN.9419 20 A method of manufacturing an IGFET device in an entirely self-registering manner, in which on the semi-conductor body a narrow silicon nitride strip is formed which cover only the active region of the body and the width of which is substantially equal to that of the transistors to be manufactured and possibly other circuit elements. This nitride strip is used as a mask for providing the channel stopper zone and as an oxidation mask for providing a first oxide layer. The nitride strip is then etched in which the strip is locally removed over its entire width and only parts remain above the channel region and contact regions which form a second oxidation mask and, in cooperation with the first oxide layer, a doping mask. The source and drain zones of the transistors and possibly further zones, for example underpasses, are formed via said doping mask after which by oxidation a sunken oxide pattern 18 formed over the whole surface with the exception of the channel regions and the contact regions. After the oxidation the remaining nitride may be removed by means of a maskless etching treatment after which the gate dielectric with the gate electrodes can be provided in a simple manner above the channel regions and the contacts, possibly preceded by the provision of contact zones, can be provided in the contact regions.