COMPARING/SUBTRACTING ANALOG-DIGITAL CONVERTER
COMPARING/SUBTRACTING ANALOG-DIGITAL CONVERTER of the Disclosure A comparing/subtracting analog-digital converter comprises n measuring units equal in number to the bit positions of a given code, adapted to determine the value of a digit in a respective bit position of the code by comparing the anal...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng ; fre |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | COMPARING/SUBTRACTING ANALOG-DIGITAL CONVERTER of the Disclosure A comparing/subtracting analog-digital converter comprises n measuring units equal in number to the bit positions of a given code, adapted to determine the value of a digit in a respective bit position of the code by comparing the analog magnitude being converter to a reference magnitude proportional to the weight of a respective bit position of the code, the reference magnitudes in the measuring units being selected to be proportional to corresponding Fibonacci p-numbers or corresponding powers of a golden p-proportion which is a positive root of equation xp+1 -xP - 1 = 0. The converter also comprises a conversion error code detector having its inputs coupled to the outputs of the measuring units from which the obtained code is read out. The outputs of the detector provide a codeword representative of the value of an error that might occur during conversion. |
---|