HIGH SPEED IGFET SENSE AMPLIFIER/LATCH

A HIGH SPEED IGFET SENSE AMPLIFIER/LATCH Disclosed is a latching type sense amplifier to be used with a static IGFET, random access memory which provides an improved memory circuit. The sense amplifier employs a pair of depletion mode devices which serve both as load devices for the latch and as means for coupling a pair of bit lines to the sense amplifier. Prior to sensing, both the bit lines and the switching nodes of the latch are precharged and balanced. The selection of a memory cell induces a small differential voltage across the bit lines, causing one of the depletion mode load devices to be more conductive than the other. When the latch is enabled, regenerative amplification causes the latch to seek one of two stable states as determined by the relative conductivities of the two depletion mode load devices, thereby latching the state of the data stored in the selected memory cell.