MULTIPROGRAMMED DATA PROCESSING SYSTEM WITH IMPROVED INTERLOCK CONTROL

A MULTIPROGRAMMED DATA PROCESSING SYSTEM WITH IMPROVED INTERLOCK CONTROL A multiprogrammed data processing system with reduced processing time for interlock instructions compares the first partial address contained in a request with a corresponding first partial address of an interlocked address in a first comparator when a main storage control unit receives the request from one of central processing units. The main storage control unit sends the request to a main memory in response to a non-coincidence signal from the first comparator. In response to a coincidence signal from the first comparator the main storage control unit compares a second partial address contained in the request with a corresponding second partial address of the interlocked address. The main storage control unit sends the request in response to a non-coincidence signal from the second comparator.