PROCEDE DE FABRICATION DE TRANSISTORS A EFFET DE CHAMP ET A PORTE ISOLEE COMPLEMENTAIRES ET TRANSISTORS OBTENUS PAR CE PROCEDE

1,265,932. Field effect transistors. RCA CORPORATION. 14 July, 1970 [21 Oct., 1969], No. 34118/70. Heading H1K. A pair of complementary insulated gateFET's are fabricated on a wafer substrate 10 (Fig. 4) of monocrystalline e.g. N-type silicon or on an epitaxial layer thereof, superimposed on a...

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1. Verfasser: L.A. MURRAY
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Zusammenfassung:1,265,932. Field effect transistors. RCA CORPORATION. 14 July, 1970 [21 Oct., 1969], No. 34118/70. Heading H1K. A pair of complementary insulated gateFET's are fabricated on a wafer substrate 10 (Fig. 4) of monocrystalline e.g. N-type silicon or on an epitaxial layer thereof, superimposed on a wafer of silicon, sapphire, or spinel; by coating with a masking layer 12 of silicon dioxide or silicon nitride or aluminium oxide by thermal reaction with oxygen or with silane and oxygen or water vapour; silane and ammonia, or aluminium chloride, carbon dioxide, and hydrogen; respectively. An opening is formed in the mask by partial coating with photoresist and etching out the uncoated portion with hydrofluoric acid or hot phosphoric acid as appropriate. The exposed surface is coated with a layer containing dopant of opposite conductivity type e.g. boron oxide by opposing to the surface a disc of boron nitride coated with oxide and heating to vaporizing temperature, and the dopant is diffused into the substrate by further extended heating to form a P-type well 18. Thereafter the oxide layer is etched off with e.g. hydrofluoric acid and a masking layer similar to that of the wafer is deposited over the well. Openings 20a, 20b are formed in the masking layer 12 by resist coating and etching, and a layer 22 of e.g. silicon dioxide containing dopant of the same type as the substrate, e.g. phosphorus, is applied to the masking layer contacting the substrate at the bottom of the openings 20a, 20b, to provide bounded N-type regions 22a, 22b; e.g. by thermal deposition from a gas containing silicon, oxygen and phosphorus. Other openings 24a, 24b are similarly opened in layers 22, 12 spaced from well 18, and a layer 26 of material e.g. silicon oxide containing dopant of opposite conductivity type to the substrate, e.g. boron, is deposited on layer 22 to contact the substrate at the bottom of the openings 24a, 24b to form a pair of bounded P-type regions 26a, 26b; e.g. by thermal deposition from a gas containing silicon, oxygen, and boron. Openings are etched in layers 26, 22, 12 to the substrate 10 between regions 22a, 22b and 26a, 26b respectively (Fig. 6, not shown) and the body is heated to diffuse the dopants into its surface, thus forming N-type source and drain electrodes 32a, 32b in the well, and P-type source and drain electrodes in the body of the substrate; oxygen being admitted to form channel insulation layers 36, 38 of silicon dioxide, (Fig. 7). Further spaced