Highly stable frequency synthesizer loop with feedforward

A frequency synthesizer loop includes a first voltage controlled oscillator and a first divider circuit for dividing a frequency of an output signal generated by the first voltage controlled oscillator by a factor of N. The synthesizer loop further includes a phase/frequency detector circuit, a loop filter circuit, a summing circuit, a feedforward amplifier, a second voltage controlled oscillator, and a second divider circuit, wherein the second divider circuit divides a frequency of a second output signal generated by the second voltage controlled oscillator by a factor of M. The synthesizer loop also includes a microprocessor for varying the value M in response to a voltage input, such that the microprocessor varies the value of M to keep the first voltage in the middle of a range of the second voltage controlled oscillator.