Techniques for parallel execution

Techniques for parallel execution

A processor, comprising: one or more circuits to cause graphics processing unit (GPU) code to be speculatively performed based, at least in part, on whether two or more central processing unit (CPU) code branch conditions are dependent on one another.

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Ju, Dz-ching, Wang, Justin
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
COMPUTING
COUNTING
PHYSICS
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Beschreibung
Zusammenfassung:A processor, comprising: one or more circuits to cause graphics processing unit (GPU) code to be speculatively performed based, at least in part, on whether two or more central processing unit (CPU) code branch conditions are dependent on one another.