Neural network processing

Neural network processing

Conflict-free, stall-free, broadcast networks on neural inference chips are provided. A neural inference chip comprises a plurality of network nodes and a network on chip interconnecting the plurality of network nodes. The network comprises at least one pair of directional paths. The paths of each p...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MODHA, Dharmendra, DEBOLE, Michael Vincent, NAYAK, Tapan Kumar, ARTHUR, John Vernon, SAWADA, Jun, APPUSWAMY, Rathinakumar, DATTA, Pallab, CASSIDY, Andrew Stephen
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
COMPUTING
COUNTING
PHYSICS
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Beschreibung
Zusammenfassung:Conflict-free, stall-free, broadcast networks on neural inference chips are provided. A neural inference chip comprises a plurality of network nodes and a network on chip interconnecting the plurality of network nodes. The network comprises at least one pair of directional paths. The paths of each pair have opposite directions and a common end. The network is configured to accept data at any of the plurality of nodes. The network is configured to propagate data along a first of the pair of directional paths from a source node to the common end of the pair of directional paths and along a second of the pair of directional paths from the common end of the pair of directional paths to one or more destination node..