Dielectric storage memory cell (monos) having high permittivity top dielectric and method therefor

A non-volatile memory (NVM) cell, which uses a storage dielectric as the storage element, has a top dielectric between a gate and the storage dielectric and a bottom dielectric between a semiconductor substrate and the storage dielectric. The top dielectric includes a relatively thick and high k dielectric layer and an interfacial layer. The interfacial layer is very thin and has a higher k than silicon oxide. The bottom dielectric layer is preferably silicon oxide because of its interfacial and tunneling properties. The cell thus has benefits resulting from a well-passivated, high k top dielectric in combination with a bottom dielectric of silicon oxide.