STAPELBARE SCHICHTEN DIE EINGEKAPSELTE INTEGRIERTE SCHALTUNGSCHIPS MIT EINER ODER MEHREREN DARÜBERLIEGENDEN VERBINDUNGSSCHICHTEN BEINHALTEN UND VERFAHREN ZU DEREN HERSTELLUNG

An electronic package comprising a stack of at least two layers (50). At east one of the layers includes: an integrated circuit chip (40), an interconnect assembly (48) formed separately from the integrated circuit chip (40) and having a test pad (14, 18) formed therein, wherein the integrated circu...

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Bibliographische Detailangaben
Hauptverfasser: YAMAGUCHI, JAMES, PEPE, ANGEL
Format: Patent
Sprache:ger
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Beschreibung
Zusammenfassung:An electronic package comprising a stack of at least two layers (50). At east one of the layers includes: an integrated circuit chip (40), an interconnect assembly (48) formed separately from the integrated circuit chip (40) and having a test pad (14, 18) formed therein, wherein the integrated circuit chip (40) is bonded to the interconnect assembly (48), and a passivating layer (55) disposed about the interconnect assembly (48) and the integrated circuit chip (40). The integrated circuit chip (40) is electrically connected to a second integrated circuit chip on a second layer of the stack. The test pad (14, 18) is accessible for electrically testing the functionality of the integrated circuit chip (40).