VERFAHREN UND BUSSCHNITTSTELLE ZUR VERBINDUNG EINES BUSES MIT EINER ANWENDUNGSVORRICHTUNG

The IEEE1394 bus communication protocol has three layers: physical layer, link layer, and transaction layer. A link layer IC implements the interface to an external application and prepares data for sending on the bus, or interprets incoming data packets from the IEEE1394 bus. A physical layer IC im...

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Bibliographische Detailangaben
Hauptverfasser: BRUNE, THOMAS, SCHWEIDLER, SIEGFRIED
Format: Patent
Sprache:ger
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Zusammenfassung:The IEEE1394 bus communication protocol has three layers: physical layer, link layer, and transaction layer. A link layer IC implements the interface to an external application and prepares data for sending on the bus, or interprets incoming data packets from the IEEE1394 bus. A physical layer IC implements the direct electrical connection to the bus and controls many functions including arbitration for sending data on the bus. According to the invention the capacity of the on-chip memory becomes assigned in a flexible way in order to be able to meet the requirements for any specific service. Further, the on-chip memory is prevented from storing data packets containing transmission errors by CRC checking on the fly header data and other data. This is performed for asynchronous data packets as well as isochronous data packets, and allows to have a minimum on-chip memory capacity only.