FEHLERTOLERANTE RECHNERANORDNUNG UND VERFAHREN ZUM BETRIEB EINER DERARTIGEN ANORDNUNG

FEHLERTOLERANTE RECHNERANORDNUNG UND VERFAHREN ZUM BETRIEB EINER DERARTIGEN ANORDNUNG

Arrangement comprises a management plane (10) and a processing plane (30), with the management plane formed from at least one computer (11, 12, 1n) that is configured to assign a time marker to incoming request data and with the processing plane having two or more computers (201, 202) that are suppl...

Ausführliche Beschreibung

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Bibliographische Detailangaben
1. Verfasser: KAISER, OLIVER
Format: Patent
Sprache:ger
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:Arrangement comprises a management plane (10) and a processing plane (30), with the management plane formed from at least one computer (11, 12, 1n) that is configured to assign a time marker to incoming request data and with the processing plane having two or more computers (201, 202) that are supplied in parallel with data from the management plane. The processing computers are configured to process the data in the next processing step, if the time marker falls within a significant time range. An Independent claim is made for a method for operating a fault tolerant computer arrangement.