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In a video decoding and decompression system having an input, an output and a plurality of processing stages between the input and the output defining a pipeline, the improvement comprising :a token generator responsive to a data stream received via said input for generating an interactive interfaci...

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Bibliographische Detailangaben
Hauptverfasser: FINCH, HELEN ROSEMARY, SOTHERAN, MARTIN WILLIAM, BOYD, KEVIN JAMES, STINCHCOMBE, ROBBINS, WILLIAM PHILIP, WISE, ADRIAN PHILIP
Format: Patent
Sprache:ger
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Zusammenfassung:In a video decoding and decompression system having an input, an output and a plurality of processing stages between the input and the output defining a pipeline, the improvement comprising :a token generator responsive to a data stream received via said input for generating an interactive interfacing control token, defining a universal adaptation unit, for data functions among said processing stages, wherein said token is variable in length and is transmitted serially through said processing stages of said pipeline, and wherein said token is altered by a said processing stage ;a first two wire interface disposed between a preceding member and a succeeding member of a pair of adjacent stages comprising an input data storage device (LDIN) and an output data storage device (LDOUT) in each member of said pair, with an output data storage device of the preceding member connected to an input data storage device of the succeeding member, the combination comprising :validation circuitry in each said member to generate a validation signal (IN_VALID, OUT_VALID) with a first state when data stored therein is valid and with a second state when data stored therein is invalid, said state defining the respective members ability to accept data;said validation circuitry having at least one validation storage device (LVOUT) to store said validation signal of the respective member of said pair ;said pair of stages being connected by an acceptance line which conveys an acceptance signal (IN_ACCEPT, OUT_ACCEPT) indicative of the ability of said succeeding member to load data stored in said preceding member ; andsaid data storage devices (LDOUT) and validation storage devices (LVOUT) being connected to enabling circuitry to generate an enabling signal to enable loading of data and validation signals into said respective storage devices ;whereby said processing stages are afforded enhanced flexibility in the processing of data.