Analysis of Dynamic Linear and Non-Linear Memristor Device Models for Emerging Neuromorphic Computing Hardware Design

The value memristor devices offer to the neuromorphic computing hardware design community rests of the ability to provide effective device models that can enable large scale integrated computing architecture application simulations. Therefore, it is imperative to develop practical, functional device models of minimum mathematical complexity for fast, reliable, and accurate computing architecture technology design and simulation. To this end, various device models have been proposed in the literature seeking to characterize the physical electronic and time domain behavioral properties of memristor devices. In this work, we analyze some promising and practical non-quasi-static linear and non-linear memristor device models for neuromorphic circuit design and computing architecture simulation. Presented at the 2010 International Joint Conference on Neural Networks (IJCNN) held 18-23 July 2010 in Barcelona, Spain. The original document contains color images.