SDVS 13 Tutorial

This report is a tutorial for the State Delta Verification System (SDVS), an automated system developed at The Aerospace Corporation for use in formal computer verification. SDVS helps users write and check mathematical proofs of computer correctness at the hardware, firm ware, and software levels....

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Bibliographische Detailangaben
Hauptverfasser:	Menas, T. K, Filippenko, I. V
Format:	Report
Sprache:	eng
Schlagworte:	ADA PROGRAMMING LANGUAGE ALGORITHMS COMPUTER APPLICATIONS COMPUTER ARCHITECTURE Computer Hardware COMPUTER LOGIC COMPUTER PROGRAM DOCUMENTATION COMPUTER PROGRAM RELIABILITY COMPUTER PROGRAM VERIFICATION Computer Programming and Software COMPUTER PROGRAMS DEBUGGING(COMPUTERS) FIRMWARE ISPS PROGRAMMING LANGUAGE MACHINE TRANSLATION SDVS 13 COMPUTER PROGRAMS SDVS(STATE DELTA VERIFICATION SYSTEM) SOFTWARE ENGINEERING USER MANUALS VHDL(VHSIC HARDWARE DESCRIPTION LANGUAGE)
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Beschreibung
Zusammenfassung:	This report is a tutorial for the State Delta Verification System (SDVS), an automated system developed at The Aerospace Corporation for use in formal computer verification. SDVS helps users write and check mathematical proofs of computer correctness at the hardware, firm ware, and software levels. Currently, SDVS is capable of verifying properties of computer descriptions or programs written in three computer languages. These languages are subsets of the hardware description languages VHDL and ISPS, and of the Ada programming language. In addition, SDVS may be used to verify the validity of a large class of formulas of first order temporal logic. This tutorial contains a description of most, but not all, of the proof capabilities of SDVS. (The SDVS 13 Users' Manual 1 should be consulted for a more comprehensive account.) The tutorial description is embedded in numerous examples of proofs in SDVS.