Proposed Object Oriented Programming (OOP) Enhancements to the Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL)

This report describes an integrated set of Object Oriented Programming (OOP) enhancements proposed for a future revision of the VHSIC hardware Description Language (VHDL). It offers inheritance with extension for VHDL record, array and private type declarations, plus multiple inheritance with extension for entities and corresponding architecture bodies, and a class wide dispatching capability for all tagged types and tagged entities. If these three enhancements are accepted by the IEEE, VHDL based design automation tools can possess new abstract design capabilities for developing and enhancing electronic hardware. Current software languages with OOP capability increase productivity and reuse by enabling the design process to inherit and extend existing data structures and functionality. By selectively inheriting what already exists, the designer minimizes duplication. Functional capabilities and characteristics can be inherited and extended without affecting existing portions of a design. VHDL, IEEE 1076, Design language, Hardware description language, OOP, Object oriented programming.