Low-Power Radiation-Hard GaAs RAM

The scope of this program is to demonstrate a 4K GaAs static RAM having very low power dissipation, 1 microwatt bit in standby, and a short access time, 10 ns, to meet the requirements of the DARPA Advanced On-Board Signal Process (AOSP). At the end of the previous program, a RAM cell capable of the required power dissipation had been developed and a 256-bit RAM had been demonstrated. In the six-month period covered by this report, the processing of several lots of three-inch wafers with 256-bit RAMs (mask set RM3) was completed. Modifications to the Cermet deposition process for high value resistors were required to adapt to the processing of 3-inch wafers, resulting in resistor uniformity that is good or better than the Cermet resistor uniformity formerly achieved for 1-inch wafers. Testing of the 256-bit RAM has been completed. A total of 15 totally functional RAMs have been identified. The read access time was as low as 1 ns. Write operations could be performed with 2 ns write pulses. A 1K RAM was designed, and the corresponding mask set was completed, except for final checking and placement of the circuits on the reticle. Small changes in cell design were made to achieve higher tolerance to threshold voltage variation and to leakage currents.