Course-Grain Reconfigurable ASIC through Multiplexer Based Switches
AbstractWe present an ASIC architecture with coarse-grainreconfigurability, by using accelerators to improve performanceover fine-grain reconfigurable architectures. A reconfigurableFFT ASIC was built as a proof of concept, and it successfullydemonstrated valid switch operation for reconfiguration.
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| Format: | Report |
| Sprache: | eng |
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| Zusammenfassung: | AbstractWe present an ASIC architecture with coarse-grainreconfigurability, by using accelerators to improve performanceover fine-grain reconfigurable architectures. A reconfigurableFFT ASIC was built as a proof of concept, and it successfullydemonstrated valid switch operation for reconfiguration. |
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