Transformer-less multilevel inverter (TMLI) with reduced device count and voltage stress

•The paper presents a new transformer-less step-up switched-capacitor topology that utilizes twelve switches to create nine different voltage levels.•The salient features of the proposed topology are the least switching components, zero leakage current, boosting capability, and reduced voltage stres...

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Veröffentlicht in:e-Prime 2024-03, Vol.7, p.100417, Article 100417
Hauptverfasser: Jena, Kasinath, Kesh, Rishi, Kumar, Dhananjay, Padhy, Aditya Prasad, Ahmed, Md Irfan, Panigrahi, Chinmoy Kumar
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Sprache:eng
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Zusammenfassung:•The paper presents a new transformer-less step-up switched-capacitor topology that utilizes twelve switches to create nine different voltage levels.•The salient features of the proposed topology are the least switching components, zero leakage current, boosting capability, and reduced voltage stresses.•The capacitors possess inherent self-balancing properties, eliminating the requirement for an extra circuit to achieve capacitor self-balancing.•The theoretical concept and feasibility of the proposed topology have been verified through simulations and experimental results. The paper introduces a new transformer-less step-up switched capacitor topology that utilizes twelve switches to create nine different voltage levels. The salient features of the proposed topology are the least switching components, zero leakage current, boosting capability and reduced voltage stresses. Furthermore, the capacitors possess inherent self-balancing properties, eliminating the requirement for an extra circuit to achieve capacitor self-balancing. The paper provides concise explanations of the operational principle, modulation scheme, and loss analysis. A brief comparative analysis of the existing topologies demonstrates the advantages and superiority of the proposed approach. Additionally, the theoretical concept and feasibility of the new topology are verified through simulations and experimental results. Without a filter, the THD at the output voltage and current of the proposed inverter has been measured at 16.48 % and 0.88 %, respectively.
ISSN:2772-6711
2772-6711
DOI:10.1016/j.prime.2023.100417