Conducting functional control of field-programmable gate arrays

Approaches to accomplishing functional control of field-programmable gate arrays (FPGA) are described. The first part of the article describes the existing equipment that allows conducting functional tests of FPGAs. A table comparing the main parameters of the equipment available in the market is gi...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:Vestnik Samarskogo universiteta. Aèrokosmičeskaâ tehnika, tehnologii i mašinostroenie (Online) tehnologii i mašinostroenie (Online), 2017-12, Vol.16 (4), p.137-146
1. Verfasser: Ogurtsov, A. A.
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Approaches to accomplishing functional control of field-programmable gate arrays (FPGA) are described. The first part of the article describes the existing equipment that allows conducting functional tests of FPGAs. A table comparing the main parameters of the equipment available in the market is given. The table contains the main parameters of the equipment that make it possible to simplify the process of conducting functional tests of FPGAs. The main advantages and disadvantages of using this equipment are shown on the basis of the analysis. In the second part of the article the author describes the main methods of conducting functional tests of FPGAs. When developing algorithms, the author divides all the internal structure of a FPGA into two functionally independent parts. The first part is the internal programmable logic, and the second part contains functional blocks built into a FPGA. The article gives examples of algorithms developed on the basis of the methods described and configuration firm-ware produced with the help of these algorithms. The developed algorithms carry out functional control of the internal logic, as well as of function blocks built into a FPGA. To develop algorithms for functional control of internal logic the author uses the method of iterative logic arrays. A method of creating built- in self-test structures is used for the control of function blocks built into a FPGA. In the final part the author draws conclusions and describes the directions of his further research.
ISSN:2542-0453
2541-7533
DOI:10.18287/2541-7533-2017-16-4-137-146