A Hybrid Integrated and Low-Cost Multi-Chip Broadband Doherty Power Amplifier Module for 5G Massive MIMO Application

[Display omitted] •In the 5G system, Doherty power amplifier (DPA) is the most popular one in massive MIMO transmitters because of its high performance and simple structure. In this paper, a hybrid integrated broadband DPA based on a multi-chip module (MCM), whose active devices are fabricated in th...

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Veröffentlicht in:Engineering (Beijing, China) China), 2024-07, Vol.38, p.223-232
Hauptverfasser: Huang, Fei, Lv, Guansheng, Wu, Huibo, Chen, Wenhua, Feng, Zhenghe
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Sprache:eng
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Zusammenfassung:[Display omitted] •In the 5G system, Doherty power amplifier (DPA) is the most popular one in massive MIMO transmitters because of its high performance and simple structure. In this paper, a hybrid integrated broadband DPA based on a multi-chip module (MCM), whose active devices are fabricated in the gallium nitride (GaN) process and passive circuits are fabricated in the gallium arsenide (GaAs) integrated passive device (IPD) process.•By the MCM approach, the area of GaN chips containing only the transistor is much smaller than the chip of monolithic integration in GaN.•Reducing the size of GaN chips can effectively bring low-cost advantages because mass production of GaN processes is relatively expensive. An inverted DPA structure with the low-Q output network is proposed to achieve better bandwidth performance and the single-driver architecture is adopted for the high gain and small area of the chip.•The proposed DPA has a bandwidth of 4.4–5 GHz that can achieve saturation of more than 45dBm. Meanwhile, the gain compression from 37 dBm to saturation power is smaller than 4 dB and the average power-added efficiency is 36.3% with 8.5-dB peak-to-average power ratio in 4.5–5 GHz. In this paper, a hybrid integrated broadband Doherty power amplifier (DPA) based on a multi-chip module (MCM), whose active devices are fabricated using the gallium nitride (GaN) process and whose passive circuits are fabricated using the gallium arsenide (GaAs) integrated passive device (IPD) process, is proposed for 5G massive multiple-input multiple-output (MIMO) application. An inverted DPA structure with a low-Q output network is proposed to achieve better bandwidth performance, and a single-driver architecture is adopted for a chip with high gain and small area. The proposed DPA has a bandwidth of 4.4–5.0 GHz that can achieve a saturation of more than 45.0 dBm. The gain compression from 37 dBm to saturation power is less than 4 dB, and the average power-added efficiency (PAE) is 36.3% with an 8.5 dB peak-to-average power ratio (PAPR) in 4.5–5.0 GHz. The measured adjacent channel power ratio (ACPR) is better than −50 dBc after digital predistortion (DPD), exhibiting satisfactory linearity.
ISSN:2095-8099
DOI:10.1016/j.eng.2024.01.017