Effect of atomic layer deposited ultra‐thin SiO2 layer on vapour‐liquid‐solid (VLS) grown high dielectric TiO2 film for Si‐based MOS device applications

Titanium dioxide (TiO2) ultra‐thin films (≈13 nm) are grown on p‐type Si substrate with and without atomic layer deposited SiO2 (5 nm) passivation layer by employing vapour‐liquid‐solid technique. Scanning electron microscope images reveal high quality film for both the samples. The formation of a c...

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Veröffentlicht in:Micro & nano letters 2021-01, Vol.16 (1), p.71-76
Hauptverfasser: Lodh, Soham, Chakraborty, Rajib, Das, Anindita
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Sprache:eng
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Zusammenfassung:Titanium dioxide (TiO2) ultra‐thin films (≈13 nm) are grown on p‐type Si substrate with and without atomic layer deposited SiO2 (5 nm) passivation layer by employing vapour‐liquid‐solid technique. Scanning electron microscope images reveal high quality film for both the samples. The formation of a crystalline TiO2 film is confirmed by X‐ray diffraction pattern, the orthorhombic (brookite) TiO2 films with [130], [160] and [212] planes are seen from peaks at 2θ= 33.5°, 61.7° and 75.7° on SiO2/Si and Si substrates, respectively. Current–voltage (I–V) characteristics reveal leakage current of ≈8.61 × 10‐8 and ≈4.05 × 10‐6 A/cm2 at +2 V for film with and without SiO2 passivation layer, respectively. Leakage current of TiO2/SiO2/Si device follows Fowler–Nordheim (FN) tunnelling at low field and Poole–Frenkel (PF) tunnelling at high field, whereas TiO2/Si device follows Schottky emission at low field and PF tunnelling at high field. Capacitance–voltage (C–V) characteristics reveal superior quality TiO2 films with high dielectric constant of 44.5 and 35.8 for TiO2/SiO2/Si and TiO2/Si samples, respectively. Significant improvement in frequency dispersion and hysteresis voltage is observed for the sample with SiO2 passivation layer. Introduction of SiO2 passivation layer also improves interface traps and reliability of the device. Hence, a low cost novel alternative technique to grow high quality TiO2 film on p‐type Si substrate with SiO2 as passivation layer is suggested for development of high performance MOS devices.
ISSN:1750-0443
1750-0443
DOI:10.1049/mna2.12011