Effects of Channel Thickness on Electrical Performance and Stability of High-Performance InSnO Thin-Film Transistors

InSnO (ITO) thin-film transistors (TFTs) attract much attention in fields of displays and low-cost integrated circuits (IC). In the present work, we demonstrate the high-performance, robust ITO TFTs that fabricated at process temperature no higher than 100 degrees C. The influences of channel thickness (t(ITO), respectively, 6, 9, 12, and 15 nm) on device performance and positive bias stress (PBS) stability of the ITO TFTs are examined. We found that content of oxygen defects positively correlates with t(ITO), leading to increases of both trap states as well as carrier concentration and synthetically determining electrical properties of the ITO TFTs. Interestingly, the ITO TFTs with a t(ITO) of 9 nm exhibit the best performance and PBS stability, and typical electrical properties include a field-effect mobility (mu(FE)) of 37.69 cm(2)/Vs, a V-on of -2.3 V, a SS of 167.49 mV/decade, and an on-off current ratio over 10(7). This work paves the way for practical application of the ITO TFTs.