FPGA based real‐time inference machine for A‐mode ultrasonic echo pattern recognition

This brief proposes a field programmable gate array (FPGA) based real‐time inference machine for A‐mode ultrasonic echo pattern recognition. The proposed scheme can aid a probe positioning of single‐transducer based ultrasound devices by detecting specific echo patterns on a scanline. The inference machine is based on a combination of a support vector machine and a finite state machine. The proposed inference machine utilizes a minimal pre‐processing for a feature extraction, considering a nature of distinctive echo patterns. In addition, a primary computation of linear support vector machine is performed sequentially, and the finite state machine for robust binary classification is relatively compact. As a result, the overall structure of the inference machine can be concisely implemented on FPGA. The proposed inference machine was assembled with a customized A‐mode ultrasound scanner. The maximum utilization percentage of look‐up‐tables in FPGA was less than 1.5%. In evaluation of inferences, the resultant sensitivity and the specificity were 96.2% and 99.87%, respectively. It shows a concept of FPGA based real‐time inference machine for A‐mode ultrasonic echo pattern recognition. The inference machine is based on a combination of a linear SVM and a FSM.