Suppressing Undesired Channel Length‐Dependent Electrical Characteristics of Fully Integrated InGaZnO Thin‐Film Transistors via Defect Control Layer

Demand for increased scalability of oxide thin‐film transistors (TFTs) continues to rise, along with the need for ever‐higher integration densities and driving currents. However, the undesirable channel length (LCH)‐dependency renders short channels difficult. To overcome such behavior in back‐chann...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:Advanced electronic materials 2023-01, Vol.9 (1), p.n/a
Hauptverfasser: Kim, Kyung Min, Yang, Jeong Suk, Kim, Hyung Tae, Han, Inhyo, Jung, Sang‐Hoon, Yang, Joon‐Young, Ha, Yong Min, Yoon, Soo Young, Kim, Hyun Jae
Format: Artikel
Sprache:eng
Schlagworte:
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Demand for increased scalability of oxide thin‐film transistors (TFTs) continues to rise, along with the need for ever‐higher integration densities and driving currents. However, the undesirable channel length (LCH)‐dependency renders short channels difficult. To overcome such behavior in back‐channel etched devices, back‐channel interface engineering using commercially favorable silicon oxide (SiOx) and the effects thereof on the electrical characteristics of fully integrated TFTs are investigated. Process‐dependent investigation reveals that a sequential formation of double‐layered SiOx with a defect control layer (DCL) effectively alleviates back‐channel damage. The proposed method imparts advanced functionality to conventional materials of SiOx. The DCL promotes oxygen inter‐diffusion to the oxygen‐deficient back‐channel, suppresses excess hydrogen inflow, and boosts out‐diffusion of residual copper from the back‐channel. This afforded excellent device uniformity and electrical characteristics with the proposed device, including field effect mobility of ≈14.0 ± 1.0 cm2 V−1 s−1, threshold voltage (Vth) of ≈1.22 ± 0.39 V, and subthreshold gate swing of ≈0.46 ± 0.09 V dec−1 at W/L = 4/7 µm. Furthermore, Vth variation when LCH decreased from 20 to 4 µm is dramatically suppressed from >11.39 V with the pristine device to 0.78 V with the proposed device, because of controlled back‐channel properties providing sufficient effective LCH. In this work, an attractive fabrication method to suppress non‐uniformity of threshold voltage, originated from device down scaling, is proposed. Sequentially formed and double‐layered dielectric of homogeneous SiOx at the back‐channel provides advanced functionality to the conventional material. Regardless of the channel length, a short‐channel capability and consistent electrical characteristics are imparted by simple back‐channel interface engineering.
ISSN:2199-160X
2199-160X
DOI:10.1002/aelm.202200986