Analysis of electro-chemical RAM synaptic array for energy-efficient weight update

While electro-chemical RAM (ECRAM)-based cross-point synaptic arrays are considered to be promising candidates for energy-efficient neural network computational hardware, array-level analyses to achieve energy-efficient update operations have not yet been performed. In this work, we fabricated CuO x /HfO x /WO x ECRAM arrays and demonstrated linear and symmetrical weight update capabilities in both fully parallel and sequential update operations. Based on the experimental measurements, we showed that the source-drain leakage current (I SD ) through the unselected ECRAM cells and resultant energy consumption—which had been neglected thus far—contributed a large portion to the total update energy. We showed that both device engineering to reduce I SD and the selection of an update scheme—for example, column-by-column—that avoided I SD intervention via unselected cells were key to enable energy-efficient neuromorphic computing.