Optimization of the Microprogram Mealy Machine Circuit Based on LUT and EMB

Introduction. The control unit is the most important block of digital systems. Unlike other blocks, the control unit generates signals in each cycle of the system and therefore consumes a significant amount of electrical power. Currently, the problem of reducing power consumption is of particular importance. FPGA (field-programmable logic array) chips are widely used in the implementation of various digital systems. According to experts, these chips will be widely used in the design of digital devices for several decades to come. This factor determines the choice of this particular element basis. The proposed method is focused on FPGA, which is manufactured by AMD Xilinx. This choice is due to the company's leading position in the FPGA chip market. The purpose of the article. One of the ways to reduce power consumption is to regularize the control device circuit and reduce the number of connections between its elements. This article proposes a solution to this problem when implementing composite microprogrammed control device (CMCD) circuits in the FPGA basis. The following FPGA chip resources are used to implement the CMCD circuit: elements of the LUT (look-up table) type, embedded memory blocks (EMB) and programmable interconnections. The main idea of the proposed method is to adapt the method of double coding of states to the features of the CMCD with the basic architecture. The analogs of the states are the CMCD microinstructions. Therefore, optimization is achieved due to double addressing of microinstructions. Results. The proposed method allows to obtain a CMCU circuit with a regular structure. The regularity consists in the fact that: logical conditions are associated only with the elements of the first level, synchronization signals are associated only with the second level of the circuit; any partial function is a circuit consisting of one LUT element. Analysis of the circuits of microprogrammed machines with double coding of states shows that regular circuits have a number of advantages over circuits based on functional decomposition: a smaller number of LUT elements and interconnections, a higher frequency of synchronization pulses (high speed), a lower value of consumed power. Conclusions. The proposed method is appropriate to use in cases where, due to the small number of inputs of the LUT elements of FPGA circuits, known methods require the use of functional decomposition, which leads to circuits with an irregular structure and a complex int