RRAM based random bit generation for hardware security applications

Resistive random access memories (RRAMs) have arisen as a competitive candidate for non-volatile memories due to their scalability, simple structure, fast switching speed and compatibility with conventional back-end processes. The stochastic switching mechanism and intrinsic variability of RRAMs still poses challenges that must be overcome prior to their massive memory commercialization. However, these very same features open a wide range of potential applications for these devices in hardware security. In this context, this work proposes the generation of a random bit by means of simultaneous write operation of two parallel cells so that only one of them unpredictably switches its state. Electrical simulations confirm the strong stochastic behavior and stability of the proposed primitive. Exploiting this fact, a Physical Unclonable Function (PUF) like primitive is implemented based on modified 1 transistor - 1 resistor (1T1R) array structure.