Small Pitch Micro-Bumping and Experimental Investigation for Under Filling 3D Stacking

Although 3D-IC integration is largely acknowledged as most promising technology to push further the scaling concept of Moore's law, a few important uncertainties are delaying high volume production. Among these uncertainties, the reliability of 3D-IC stacked components is the most important. A key element in 3D stacking reliability is the choice of the correct UF to integrate in the assembly processing: die stacking and final packaging. In this paper we report the recent results coming from the UF screening and 3D stacking activities. These activities are performed at Imec in the frame of the 3D Imec Industrial Affiliation Program (3D-IIAP). After describing the test vehicle used in this work, we introduce some of the requirements in term of process improvement and stacking accuracy to enable 3D stacking in case of small pitch micro-bumps. We then present recent results coming from the UF screening activity and report on the electrical characterization of the 3D stacks. This characterization is done by measuring the electrical resistance of the daisy chains connections between top/bottom dies bumps. The stacks are done with thermo-compression bonding and using die-to-die approach. The stacks are lately exposed to thermo-cycling processing followed by further characterization.